1st Call for TTP Proposals for HPC

Closed

Start: July 1, 2018
Deadline: Nov. 15, 2018
Budget: EUR 45 000

Partial Funding for bilateral Academia-Industry Technology Transfer Projects in HPC

Eurolab4HPC is a Coordination Action funded by the European Commission under H2020 with the bold commitment to build the foundation for a European Research Center of Excellence in High-Performance Computing (HPC) Systems.

A funded Technology Transfer Project (TTP) typically lasts 6 months and needs to end by 31 December 2019. A TTP performs a bilateral technology transfer between one academic partner as technology provider and one industry partner as technology receiver. The minimum total budget of a TTP is EUR 30 000, of which Eurolab4HPC can pay up to 50% (EUR 15 000). Eurolab4HPC funding is only for academic beneficiaries, e.g., universities, publicly funded research centers. The company partner will either co-fund the transfer project at the university, provide in-kind contributions, or invest its own work. During the review process, TTP proposals with a cash contribution from the company partner will be preferred.

After being selected for a grant, the grantee’s organisation will sign a subcontracting agreement with Eurolab4HPC. This subcontract will clarify what tasks the organization will perform to be entitled to the EUR 15 000 TTP grant. The Eurolab4HPC grant will amount to EUR 15 000 excl. VAT and will be paid upon receival of an invoice from the grantee’s institution. A public summary of the activity will be published after the TTP completion.

Only companies with business activities and/or physical sites in European Union or Associated States are eligible as technology transfer partners. However, the actual collaborating company department does not necessarily have to be located itself in these countries. The research institution and the company are responsible for entering into a bilateral contract on the technology transfer IPR issues.

The evaluation of the project proposals will be done by at least two external independent experts selected by the steering committee under a Non-Disclosure Agreement (NDA), and without conflict of interest with the proposers. The evaluation process will be composed of five steps: (i) eligibility check, (ii) review by external experts, (iii) consensus meeting chaired by the partner in charge of the call, (iv) decision to grant the best proposals by the steering committee, (v) feedback about the outcome of the evaluation process to all the proposers. All applicants will receive information about the outcome of their application by 10 December 2018.

See the attached instructions and proposal template for more details. The proposals have to be submitted via the Eurolab4HPC website no later than on 30 September 2018. The funding period after proposal acceptance is expected to start at the earliest on 10 December 2018.

Funded projects

Title	Team
Advanced Storage Monitoring (ASM) Earthquakes for Resilience	University of Reading / DDN	Julian Martin Kunkel and Jean-Thomas Acquaviva	Advanced Storage Monitoring (ASM) Earthquakes for Resilience Julian Martin Kunkel and Jean-Thomas Acquaviva University of Reading / DDN This TTP integrates advanced monitoring capabilities into FUSE. The integration covers novel I/O metrics throughout the I/O stack. This work focuses on the FUSE implementation of the Infinite Memory Engine (IME), a product designed as a burst-buffer optimized for random I/O. We developed a user-friendly way for online visualization and description of HPC applications’ I/O behaviour. For that purpose, we build a monitoring framework on top of open-source software: Elasticsearch, Grafana, and FUSE, and improved the monitoring capabilities of the DDN IME FUSE client. Besides the improvements to the IME FUSE client, an open-source monitoring for FUSE was contributed that can be integrated easily into existing FUSE modules. The integrated tool allows detection of poor I/O performance, and the identification of problematic HPC applications and this work is an essential step towards optimization and optimization of such applications. In Figure 1, you can see the visualization in Grafana when running the metadata benchmark MD-Workbench. This is the basic dashboard reporting in an interval of 1 second, additional dashboards showing the minimum and maximum latency and the number of operations performed in the interval can be added. An unexpected and long-term positive achievement of the TTP was that during the numerous performance analysis and experiments conducted, we have detected some performance limitations within FUSE and analyzed the feasibility of fixing these issues. Ultimately, we hope that this work leads to an improved version of FUSE, bringing value to the whole Linux community.
Hi-Tech SoluTions fOr Waste mAnaGement systEms (Hi-Tech STOWAGE)	University of Salento	Luca Catarinuci, Riccardo Colella, Luigi Patrono and Ilaria Sergi	Hi-Tech SoluTions fOr Waste mAnaGement systEms (Hi-Tech STOWAGE) Luca Catarinuci, Riccardo Colella, Luigi Patrono and Ilaria Sergi University of Salento The TTP project “Hi-Tech SoluTions fOr Waste mAnaGement systEms (Hi-Tech STOWAGE)” is focused on the innovative solutions enabling the Internet of Things in the Waste Management Systems field. In particular, a new cost-effective HPC CS-RFID-based product and service has been defined for smart traceability of both recyclable and non-recyclable urban waste of large communities and cities. While the hardware (HW) device is able to wirelessly provide waste-bin identification and waste weight to the operator, the cloud-based software (SW) infrastructure collects them along with positioning, time stamp and operator-ID, in order to both generate real-time alerts (wrong bin positioning, erroneous waste typology) and provide to heterogeneous stakeholders (citizens, municipalities, waste management companies, etc.) a monitoring dashboard along with data for elaboration.
HPC platform for wearable applications	University of Salento	Giuseppina Monti	HPC platform for wearable applications Giuseppina Monti University of Salento The aim of this work was to develop a low-cost sensing platform for wearable applications. To this end, crucial features are compact size, low-power operation and wearability. Hence, in order to satisfy all these requirements particular attention was paid to the selection of the materials and electronic components. The proposed solution consists of five main blocks: a wearable antenna, a transceiver, a control processing unit (CPU), a sensing module and a power management unit. The CPU is the block which makes possible the communication between the wireless interface and the sensors. In particular, the CPU receives the raw sensing data, makes a preliminary local analysis and finally sends the results to the wireless interface. To achieve compact size, a wearable patch antenna and a chip which integrates both transceiver and CPU have been selected. In particular, the IC Texas CC2640 has been selected for the implementation of both the transceiver and the control processing unit. As for the antenna, in order to obtain a solution easily embeddable in wearable accessories, a fully-textile solution has been developed. In particular, a bi-layer structure of soft felt has been used as substrate. While, all the conductive parts have been fabricated by means of a low-cost self-adhesive conductive non-woven fabric. As for the wireless interface, the proposed platform is able to communicate with mobile devices, such as computer or smartphone, enabling a wireless monitoring of sensed data.